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| NTD40N03R Power MOSFET 45 Amps, 25 Volts N-Channel DPAK Features * * * * * * Planar HD3e Process for Fast Switching Performance Low RDS(on) to Minimize Conduction Loss Low Ciss to Minimize Driver Loss Low Gate Charge Optimized for High Side Switching Requirements in High-Efficiency DC-DC Converters Pb-Free Packages are Available http://onsemi.com 45 AMPERES, 25 VOLTS RDS(on) = 12.6 mW (Typ) N-CHANNEL D MAXIMUM RATINGS (TJ = 25C unless otherwise specified) Parameter Drain-to-Source Voltage Gate-to-Source Voltage - Continuous Thermal Resistance - Junction-to-Case Total Power Dissipation @ TC = 25C Drain Current - Continuous @ TC = 25C, Chip - Continuous @ TA = 25C, Limited by Wires - Single Pulse (tp 10 ms) Thermal Resistance - Junction-to-Ambient (Note 1) Total Power Dissipation @ TA = 25C Drain Current - Continuous @ TA = 25C Thermal Resistance - Junction-to-Ambient (Note 2) Total Power Dissipation @ TA = 25C Drain Current - Continuous @ TA = 25C Operating and Storage Temperature Range Maximum Lead Temperature for Soldering Purposes, 1/8 from case for 10 seconds Symbol VDSS VGS RqJC PD ID ID ID RqJA PD ID RqJA PD ID TJ, Tstg TL Value 25 20 3.0 50 45 32 100 71.4 2.1 9.2 100 1.5 7.8 -55 to 175 260 Unit Vdc Vdc C/W W A A A C/W W A C/W W A C C 4 12 3 CASE 369AA DPAK (Surface Mount) STYLE 2 1 2 3 CASE 369D DPAK (Straight Lead) STYLE 2 S 4 G MARKING DIAGRAM & PIN ASSIGNMENTS 4 Drain YWW T40 N03 4 Drain YWW T40 N03 3 Source 1 Gate 2 Drain 40N03= Device Code Y = Year WW = Work Week 3 Source Publication Order Number: NTD40N03R/D Maximum ratings are those values beyond which device damage can occur. Maximum ratings applied to the device are individual stress limit values (not normal operating conditions) and are not valid simultaneously. If these limits are exceeded, device functional operation is not implied, damage may occur and reliability may be affected. 1. When surface mounted to an FR4 board using 0.5 sq. in pad size. 2. When surface mounted to an FR4 board using minimum recommended pad size. 1 Gate 2 Drain ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet. (c) Semiconductor Components Industries, LLC, 2004 1 April, 2004 - Rev. 5 NTD40N03R ELECTRICAL CHARACTERISTICS (TJ = 25C unless otherwise specified) Characteristics OFF CHARACTERISTICS Drain-to-Source Breakdown Voltage (Note 3) (VGS = 0 Vdc, ID = 250 mAdc) Temperature Coefficient (Positive) Zero Gate Voltage Drain Current (VDS = 20 Vdc, VGS = 0 Vdc) (VDS = 20 Vdc, VGS = 0 Vdc, TJ = 150C) Gate-Body Leakage Current (VGS = 20 Vdc, VDS = 0 Vdc) ON CHARACTERISTICS (Note 3) Gate Threshold Voltage (Note 3) (VDS = VGS, ID = 250 mAdc) Threshold Temperature Coefficient (Negative) Static Drain-to-Source On-Resistance (Note 3) (VGS = 4.5 Vdc, ID = 10 Adc) (VGS = 10 Vdc, ID = 10 Adc) Forward Transconductance (Note 3) (VDS = 10 Vdc, ID = 10 Adc) DYNAMIC CHARACTERISTICS Input Capacitance Output Capacitance Transfer Capacitance SWITCHING CHARACTERISTICS (Note 4) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Gate Charge (VGS = 4.5 Vdc, ID = 10 Adc, VDS = 10 Vdc) (Note 3) SOURCE-DRAIN DIODE CHARACTERISTICS Forward On-Voltage (IS = 10 Adc, VGS = 0 Vdc) (Note 3) (IS = 10 Adc, VGS = 0 Vdc, TJ = 125C) VSD - - trr (IS = 10 Adc, VGS = 0 Vdc, dIS/dt = 100 A/ms) (Note 3) Reverse Recovery Stored Charge 3. Pulse Test: Pulse Width 300 ms, Duty Cycle 2%. 4. Switching characteristics are independent of operating junction temperatures. ta tb QRR - - - - 0.85 0 85 0.71 20.4 8.25 12.1 0.007 1.2 12 - - - - - mC Vdc (VGS = 10 Vdc, VDD = 10 Vdc, ID = 10 Adc, RG = 3 W) td(on) tr td(off) tf QT Q1 Q2 - - - - - - - 4.5 19.5 16.7 3.5 5.78 2.1 2.5 - - - - - - - nC ns ( (VDS = 20 Vdc, VGS = 0 V, f = 1 MHz) , , ) Ciss Coss Crss - - - 584 254 99 - - - pF VGS(th) 1.0 - RDS(on) - - gFS - 20 - 18.6 12.6 23 16.5 Mhos 1.7 - 2.0 - Vdc mV/C mW V(br)DSS 25 - IDSS - - IGSS - - - - 1.0 10 100 nAdc 28 - - - Vdc mV/C mAdc Symbol Min Typ Max Unit Reverse Recovery Time ns http://onsemi.com 2 NTD40N03R 20 ID, DRAIN CURRENT (AMPS) 10 V 8V 6V 4V 3.2 V 20 3.5 V ID, DRAIN CURRENT (AMPS) 3.4 V VDS 10 V 16 16 12 12 8 3V 2.8 V VGS = 2.6 V 8 TJ = 25C 4 0 0 2 4 6 8 4 0 TJ = 125C 0 1 2 TJ = -55C 3 4 5 10 VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) VGS, GATE-TO-SOURCE VOLTAGE (VOLTS) Figure 1. On-Region Characteristics RDS(on), DRAIN-TO-SOURCE RESISTANCE (W) RDS(on), DRAIN-TO-SOURCE RESISTANCE (W) Figure 2. Transfer Characteristics 0.040 VGS = 10 V 0.032 0.040 TJ = 150C TJ = 125C 0.024 TJ = 25C 0.032 0.024 TJ = 150C 0.016 TJ = 125C TJ = 25C TJ = -55C 0 0 4 8 12 16 20 ID, DRAIN CURRENT (AMPS) 0.016 TJ = -55C 0.008 0.008 VGS = 4.5 V 0 0 4 8 12 16 20 ID, DRAIN CURRENT (AMPS) Figure 3. On-Resistance versus Drain Current and Temperature RDS(on), DRAIN-TO-SOURCE RESISTANCE (NORMALIZED) 1.8 1.6 1.4 1.2 1 0.8 0.6 -50 100 -25 0 25 50 75 100 125 150 0 ID = 10 A VGS = 10 V IDSS, LEAKAGE (nA) 10,000 Figure 4. On-Resistance versus Drain Current and Temperature VGS = 0 V TJ = 150C 1000 TJ = 125C 5 10 15 20 25 TJ, JUNCTION TEMPERATURE (C) VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) Figure 5. On-Resistance Variation with Temperature Figure 6. Drain-to-Source Leakage Current versus Voltage http://onsemi.com 3 NTD40N03R VGS, GATE-TO-SOURCE VOLTAGE (VOLTS) 1000 VDS = 0 V VGS = 0 V C, CAPACITANCE (pF) 800 Ciss Crss 600 TJ = 25C 8 VGS 6 QT 4 Q1 2 ID = 10 A TJ = 25C 0 0 2 4 6 8 Qg, TOTAL GATE CHARGE (nC) Q2 Ciss 400 Coss 200 0 10 5 VGS 0 VDS 5 10 15 20 GATE-TO-SOURCE OR DRAIN-TO-SOURCE VOLTAGE (VOLTS) Crss Figure 7. Capacitance Variation Figure 8. Gate-to-Source and Drain-to-Source Voltage versus Total Charge 20 IS, SOURCE CURRENT (AMPS) 100 VDS = 10 V ID = 10 A VGS = 10 V t, TIME (ns) tr td(off) 10 td(on) tf 18 16 14 12 10 8 6 4 2 0 0 VGS = 0 V TJ = 25C 1 1 10 RG, GATE RESISTANCE (W) 100 0.2 0.4 0.6 0.8 1.0 VSD, SOURCE-TO-DRAIN VOLTAGE (VOLTS) Figure 9. Resistive Switching Time Variation versus Gate Resistance Figure 10. Diode Forward Voltage versus Current 100 I D, DRAIN CURRENT (AMPS) SINGLE PULSE VGS = 20 V TC = 25C 10 ms 100 ms 10 1 ms RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT 0.1 10 ms dc 100 1 1 10 VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) Figure 11. Maximum Rated Forward Biased Safe Operating Area http://onsemi.com 4 NTD40N03R r(t), EFFECTIVE TRANSIENT THERMAL RESISTANCE (NORMALIZED) 1.0 D = 0.5 0.2 0.1 0.1 0.05 0.02 0.01 SINGLE PULSE 0.01 0.00001 0.0001 0.001 0.01 t, TIME (s) 0.1 1 10 t2 DUTY CYCLE, D = t1/t2 t1 P(pk) RqJC(t) = r(t) RqJC D CURVES APPLY FOR POWER PULSE TRAIN SHOWN READ TIME AT t1 TJ(pk) - TC = P(pk) RqJC(t) Figure 12. Thermal Response http://onsemi.com 5 NTD40N03R ORDERING INFORMATION Device NTD40N03R NTD40N03RG NTD40N03R-1 NTD40N03R-1G NTD40N03RT4 NTD40N03RT4G Package DPAK DPAK (Pb-Free) DPAK (Straight Lead) DPAK (Straight Lead, Pb-Free) DPAK DPAK (Pb-Free) Shipping 75 Units/Rail 75 Units/Rail 75 Units/Rail 75 Units/Rail 2500 Tape & Reel 2500 Tape & Reel For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 6 NTD40N03R PACKAGE DIMENSIONS DPAK (SINGLE GAUGE) CASE 369AA-01 ISSUE O NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. INCHES MIN MAX 0.235 0.245 0.250 0.265 0.086 0.094 0.025 0.035 0.018 0.024 0.033 0.045 0.018 0.023 0.090 BSC 0.180 0.215 0.025 0.040 0.020 --- 0.035 0.050 0.155 --- MILLIMETERS MIN MAX 5.97 6.22 6.35 6.73 2.19 2.38 0.63 0.88 0.46 0.61 0.83 1.14 0.46 0.58 2.29 BSC 4.57 5.45 0.63 1.01 0.51 --- 0.89 1.27 3.93 --- -T- B V R 4 SEATING PLANE C E A S 1 2 3 Z U F L D 2 PL J DIM A B C D E F J L R S U V Z 0.13 (0.005) M T STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN SOLDERING FOOTPRINT* 6.20 0.244 2.58 0.101 5.80 0.228 3.0 0.118 1.6 0.063 6.172 0.243 SCALE 3:1 mm inches *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 7 NTD40N03R PACKAGE DIMENSIONS DPAK (SINGLE GAUGE) CASE 369D-01 ISSUE B B V R 4 C E NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. INCHES MIN MAX 0.235 0.245 0.250 0.265 0.086 0.094 0.027 0.035 0.018 0.023 0.037 0.045 0.090 BSC 0.034 0.040 0.018 0.023 0.350 0.380 0.180 0.215 0.025 0.040 0.035 0.050 0.155 --- MILLIMETERS MIN MAX 5.97 6.35 6.35 6.73 2.19 2.38 0.69 0.88 0.46 0.58 0.94 1.14 2.29 BSC 0.87 1.01 0.46 0.58 8.89 9.65 4.45 5.45 0.63 1.01 0.89 1.27 3.93 --- Z A 3 S -T- SEATING PLANE 1 2 K F D G 3 PL J H 0.13 (0.005) M DIM A B C D E F G H J K R S V Z T STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: orderlit@onsemi.com N. American Technical Support: 800-282-9855 Toll Free USA/Canada Japan: ON Semiconductor, Japan Customer Focus Center 2-9-1 Kamimeguro, Meguro-ku, Tokyo, Japan 153-0051 Phone: 81-3-5773-3850 ON Semiconductor Website: http://onsemi.com Order Literature: http://www.onsemi.com/litorder For additional information, please contact your local Sales Representative. http://onsemi.com 8 NTD40N03R/D |
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